In 3D graphical processing, there are a number of display data processing steps which are conventionally run on a computing device which has generated display data, commonly known as a host device, prior to the finished display data being transmitted to a connected display device for display. Because the host device has a limited capacity for such processing, the number of varied display devices that can be connected and supplied with data is necessarily limited.
Shaders are sets of pre-generated standard instructions which are conventionally run entirely on the host device at each step in the display data processing pipeline. Each application or other graphics producer on a host device may run its own instance of a standard shader simultaneously in a multiplexed system controlled by the Graphical Processing Unit (GPU) of the host device.
Since the shaders may handle different parts of the display data processing pipeline, they have different purposes. Vertex shaders take vertices as input and perform transformations on them such as rotation and scaling. Geometry shaders take primitives such as shapes and lines as input and modify them prior to rasterization, which converts vertices to pixels. Pixel shaders, sometimes also known as Fragment shaders, take pixel data as input and produce pixel output which has been blended, lit, etc.
Because all such processes are carried out on the host device, there is a processing bottleneck on the host device which makes it more difficult to connect multiple display devices or especially large display devices. The invention aims to mitigate this problem.